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	<title>The Processor Verification Company</title>
	<link>http://www.obsidiansoft.com</link>
	<description>Obsidian Software</description>
	<lastBuildDate>Fri, 05 Mar 2010 19:24:15 +0000</lastBuildDate>
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	<item>
		<title>Is There Hope for the US Fab Industry?</title>
		<description><![CDATA[For the past two quarters analysts have been telling us that we&#8217;re on the upswing of the crash. In their World Fab Forecast, published in May, San Jose industry research firm Semi predicted that the outlook for fabs in 2010 was fair with &#8220;signs of increasing investment.&#8221; The firm projected that global market leaders with [...]]]></description>
		<link>http://www.obsidiansoft.com/2010/03/is-there-hope-for-the-us-fab-industry/</link>
			</item>
	<item>
		<title>Multicore Verification of an ARM Processor</title>
		<description><![CDATA[The goal of multi-processor verification, simply put, is to find errors that emerge when individual CPUs interact with each other. This typically involves behaviors encountered when sharing various resources such as caches, registers and main memory. Multi-processor (MP) errors are among the most difficult to debug in all of functional verification, especially given the complexity [...]]]></description>
		<link>http://www.obsidiansoft.com/2009/11/multi-processor-verification-of-an-arm-processor-core/</link>
			</item>
	<item>
		<title>Verification Planning for ARM Architectures</title>
		<description><![CDATA[By Melanie Typaldos and Tim Short
The early stages of functional verification present several unique challenges that must be overcome to achieve first silicon on schedule. This article identifies several common problems that Obsidian recently encountered in the verification of a new ARM based processor design and discusses how the RAVEN random test generator was used [...]]]></description>
		<link>http://www.obsidiansoft.com/2009/10/beginning-verification-of-an-arm-processor-design/</link>
			</item>
	<item>
		<title>Using RAVEN to Generate Self-Checking Tests in Silicon Validation</title>
		<description><![CDATA[By Tim Short and Melanie Typaldos, Obsidian Software
Sure, self-checking code can be used with directed tests. But it&#8217;s time consuming, cumbersome and there&#8217;s no randomization. RAVEN has several features that make it work really well in a silicon validation environment for creating self-checking tests.
Inherent Self-Checking
Taking them one by one. If you&#8217;re leaving RAVEN undirected, which [...]]]></description>
		<link>http://www.obsidiansoft.com/2009/10/using-raven-to-generate-self-checking-tests-in-silicon-validation/</link>
			</item>
	<item>
		<title>Uncovering Processor Design Errors Spanning Page Boundaries</title>
		<description><![CDATA[Functional errors are not always easy to find in processor designs, especially when they require a specific series of events to occur before their presence is revealed. Obsidian&#8217;s verification engineers recently discovered an error of this type spanning page boundaries in a multi-core ARM design.
When a load/store instruction crosses a page boundary, it is difficult [...]]]></description>
		<link>http://www.obsidiansoft.com/2009/09/uncovering-processor-design-errors-spanning-page-boundaries/</link>
			</item>
	<item>
		<title>State of the Industry Panel Discussion</title>
		<description><![CDATA[On June 30th, DVClub Austin will be hosting a state of the industry panel discussion. Topics are set to include industry consolidation, downsizing trends, corporate agility, and anything else that the audience can throw at our panelists. As always, DVClub will take place at Cool River Cafe on Parmer Ln.
Confirmed Panelists include:
Ty Garibay

Ty Garibay is [...]]]></description>
		<link>http://www.obsidiansoft.com/2009/06/state-of-the-industry-panel-discussion/</link>
			</item>
	<item>
		<title>Microprocessor Test and Verification Conference</title>
		<description><![CDATA[Preliminary Call for Papers:
10th International Workshop on Microprocessor Test and Verification (MTV 2009)
December 7-8, 2009, Hyatt Regency On Town Lake, Austin, Texas, USA.
Website: http://mtv.ece.ucsb.edu/MTV/
This is the 10th edition of the MTV Workshop, a testament to its success in providing an ideal environment for cross- examination of test and verification experiences and innovative solutions. MTV has [...]]]></description>
		<link>http://www.obsidiansoft.com/2009/06/microprocessor-test-and-verification-conference/</link>
			</item>
	<item>
		<title>Obsidian Solution Value</title>
		<description><![CDATA[Experience Productivity Gains
Design productivity is tied to the ability to quickly generate large numbers of tests. RAVEN can be implemented in nightly test suites to continually generate hundreds of thousands of tests. Processor designs are verified with less time and effort than with alternative verification methodologies.
Fewer Respins
Obsidian can help clients eliminate costly manufacturing respins due [...]]]></description>
		<link>http://www.obsidiansoft.com/2009/06/roi-proposition/</link>
			</item>
	<item>
		<title>Knowing When Verification is Complete</title>
		<description><![CDATA[This article presents an overview of functional design verification using a coverage driven methodology while attempting to answer the question of how much testing is enough.]]></description>
		<link>http://www.obsidiansoft.com/2009/03/knowing-when-verification-is-complete/</link>
			</item>
	<item>
		<title>Bailey on Verification at the Club</title>
		<description><![CDATA[By Grant Martin
This blog post originally appeared at:
http://www.chipdesignmag.com/martins/2009/03/19/bailey-on-verification-at-the-club/
— March 19, 2009 @ 11:14 pm
Today I attended the latest meeting of the Silicon Valley branch of the DVClub. For those not familiar with the DVClub (DV = Design Verification), it was started by Eric Hennenhoefer in Austin a few years ago. It now has branches in [...]]]></description>
		<link>http://www.obsidiansoft.com/2009/03/bailey-on-verification-at-the-club/</link>
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