Obsidian’s coverage-driven verification solutions utilize functional coverage goals in conjunction with the RAVEN® random test generator to achieve optimal results. Tests are typically generated using the customer’s Instruction Set Simulator (ISS) with results compared against the RTL. Obsidian generates only valid sequences of processor instructions with associated data values, initial values for multilevel caches and initial processor register values. This saves time normally wasted on repetitive register setups and generating invalid test sequences. Obsidian’s patented random test generation technology can reach up to 98% coverage of even complex designs, virtually eliminating the need for directed tests.
